Clock Domains

Clock Domains

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Count: 5

Name: Origin	Rising	Falling	Graph	Details
CLK   - CLK: spacefibre_light_top.vhd#51 (Port)	✔	✗	Graph	Details
gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx   - hssl_clock_o: hssl_SpaceFibre_64b.vhd#156 (Blackbox port: hssl_clock_o)	✔	✗	Graph	Details
AXIS_ACLK_TX_DL   - AXIS_ACLK_TX_DL: spacefibre_light_top.vhd#65 (Port)	✔	✗	Graph	Details
AXIS_ACLK_RX_DL   - AXIS_ACLK_RX_DL: spacefibre_light_top.vhd#72 (Port)	✔	✗	Graph	Details
inst_reset_sync_clk_from_GTY.reset_gen_rr_n   - inst_reset_sync_clk_from_GTY.reset_gen_rr_n: reset_gen.vhd#56 (Flip-flop)	✔	✗	Graph	Details

Clock Management Module (CMM)

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None identified.