Reset Domains

Reset Management Module (RMM)

None identified.

All global resets should be generated within a unique reset management module (RMM). A dedicated RMM brings a lot in terms of reuse and portability. Because all vendor-specific reset elements are generated within the same module, it is easier to replace this module to target other FPGAs.

Global Reset Domains

Count	Graph
7

Name: Origin	Asynchronous	Synchronous	Active High	Active Low
RST_N - RST_N: spacefibre_light_top.vhd#50 (Port)	✔	✗	✗	✔
inst_data_link.inst_data_link_reset.lane_reset_dlre_i - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop)	✗	✔	✔	✗
inst_reset_sync_clk_from_GTY.reset_gen_rr_n - inst_reset_sync_clk_from_GTY.reset_gen_rr_n: reset_gen.vhd#56 (Flip-flop)	✔	✗	✗	✔
inst_data_link.gen_data_in_buff(6).inst_data_in_buf.rst_n_fifo - inst_data_link.gen_data_in_buff(6).inst_data_in_buf.rst_n_fifo: data_in_buf.vhd#194 (Flip-flop)	✔	✗	✗	✔
inst_data_link.inst_data_in_bc_buf.rst_n_fifo - inst_data_link.inst_data_in_bc_buf.rst_n_fifo: data_in_bc_buf.vhd#158 (Flip-flop)	✔	✗	✗	✔
inst_data_link.gen_data_out_buff(0).inst_data_out_buff.rst_n_fifo - inst_data_link.gen_data_out_buff(0).inst_data_out_buff.rst_n_fifo: data_out_buf.vhd#225 (Flip-flop)	✔	✗	✗	✔
inst_data_link.inst_data_out_bc_buf.rst_n_fifo - inst_data_link.inst_data_out_bc_buf.rst_n_fifo: data_out_bc_buf.vhd#172 (Flip-flop)	✔	✗	✗	✔

A reset domain is considered as global if:

It is used in several modules.
Or it is used in a single module and by at least 20% of the flip-flops in the design.

Local Reset Domains

Count: 52

Name: Origin	Asynchronous	Synchronous	Active High	Active Low
gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx - hssl_clock_o: hssl_SpaceFibre_64b.vhd#156 (Blackbox port: hssl_clock_o)	✔	✗	✗	✔
AXIS_ARSTN_RX_DL - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port)	✔	✗	✗	✔
gen_inst_phy_plus_lane.inst_phy_plus_lane.rst_lane_reset_dl_i - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_lane_init_fsm.LANE_STATE_PLIF: ppl_64_lane_init_fsm.vhd#295 (Flip-flop)	✔	✗	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_mid_buf.RD_DATA_VLD**: fifo_dc_drop_bad_frame.vhd#329 (Flip-flop)	✗	✔	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: gen_inst_phy_plus_lane.inst_phy_plus_lane.reset_n - LANE_RESET: spacefibre_light_top.vhd#139 (Port) - RST_N: spacefibre_light_top.vhd#50 (Port) - gen_inst_phy_plus_lane.inst_phy_plus_lane.lane_reset_dl_i: phy_plus_lane_64b.vhd#722 (Flip-flop)	✔	✗	✗	✔
Complex: ** - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)	✗	✔	✔	✗
Complex: ** - LANE_RESET: spacefibre_light_top.vhd#139 (Port) - RST_N: spacefibre_light_top.vhd#50 (Port) - gen_inst_phy_plus_lane.inst_phy_plus_lane.lane_reset_dl_i**: phy_plus_lane_64b.vhd#722 (Flip-flop)	✔	✗	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_mid_buf_bc.RD_DATA_VLD**: fifo_dc_drop_bad_frame.vhd#329 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.FRAME_ERR_DWI: data_word_id_fsm.vhd#134 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.RXNOTHING_ACTIVE_DWI**: data_word_id_fsm.vhd#134 (Flip-flop)	✗	✔	✔	✗
Complex: ** - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_bus_split_rx.LANE_ACTIVE_PLBSR: ppl_64_bus_split_rx.vhd#276 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)	✗	✔	✔	✗
Complex: ** - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_bus_split_rx.FIFO_RX_DATA_VALID_PLBSR: ppl_64_bus_split_rx.vhd#88 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.trans_pol_flg: data_err_management.vhd#269 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.END_FRAME_DWI: data_word_id_fsm.vhd#273 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.FRAME_ERR_DWI: data_word_id_fsm.vhd#134 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.NEW_WORD_DWI: data_word_id_fsm.vhd#273 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.RXNOTHING_ACTIVE_DWI: data_word_id_fsm.vhd#134 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.TYPE_FRAME_DWI**: data_word_id_fsm.vhd#273 (Flip-flop)	✗	✔	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.END_FRAME_DWI: data_word_id_fsm.vhd#273 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.FRAME_ERR_DWI: data_word_id_fsm.vhd#134 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.NEW_WORD_DWI: data_word_id_fsm.vhd#273 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.RXNOTHING_ACTIVE_DWI: data_word_id_fsm.vhd#134 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.TYPE_FRAME_DWI**: data_word_id_fsm.vhd#273 (Flip-flop)	✗	✔	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.VC_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.VC_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.VC_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - AXIS_ARSTN_TX_DL: spacefibre_light_top.vhd#64 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_bus_split_rx.DATA_RX_PLBSR: ppl_64_bus_split_rx.vhd#88 (Flip-flop) - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_bus_split_rx.FIFO_RX_DATA_VALID_PLBSR: ppl_64_bus_split_rx.vhd#88 (Flip-flop) - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_bus_split_rx.VALID_K_CHARAC_RX_PLBSR: ppl_64_bus_split_rx.vhd#88 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.VC_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.current_state**: data_word_id_fsm.vhd#134 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.VC_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.current_state**: data_word_id_fsm.vhd#134 (Flip-flop)	✗	✔	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.VC_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.VC_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_bus_split_rx.DATA_RX_PLBSR: ppl_64_bus_split_rx.vhd#88 (Flip-flop) - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_bus_split_rx.FIFO_RX_DATA_VALID_PLBSR: ppl_64_bus_split_rx.vhd#88 (Flip-flop) - gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_bus_split_rx.VALID_K_CHARAC_RX_PLBSR: ppl_64_bus_split_rx.vhd#88 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.current_state**: data_word_id_fsm.vhd#134 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_word_id_fsm.current_state**: data_word_id_fsm.vhd#134 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.VC_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_long_err: data_crc_check.vhd#109 (Flip-flop) - inst_data_link.inst_data_crc_check.crc_short_err: data_crc_check.vhd#156 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - AXIS_ARSTN_RX_DL: spacefibre_light_top.vhd#71 (Port) - RST_N**: spacefibre_light_top.vhd#50 (Port)	✔	✗	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_mac.req_ack_done**: data_mac.vhd#132 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK: data_crc_check.vhd#199 (Flip-flop) - inst_data_link.inst_data_err_management.near_end_rpf: data_err_management.vhd#107 (Flip-flop) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - inst_data_link.inst_data_link_reset.lane_reset_dlre_i: data_link_reset.vhd#92 (Flip-flop) - inst_data_link.inst_data_seq_check.CRC_ERR_DSCHECK: data_seq_check.vhd#128 (Flip-flop) - inst_data_link.inst_data_seq_check.RXERR_DSCHECK: data_seq_check.vhd#128 (Flip-flop) - inst_data_link.inst_data_seq_check.SEQ_NUM_ERR_DSCHECK: data_seq_check.vhd#128 (Flip-flop) - inst_data_link.inst_data_seq_check.TYPE_FRAME_DSCHECK**: data_seq_check.vhd#128 (Flip-flop)	✗	✔	✔	✗
Complex: ** - NACK_RST_EN: spacefibre_light_top.vhd#82 (Port) - inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)	✗	✔	✔	✗