# Reset Domains
## Reset Management Module (RMM)
None identified.
*All global resets should be generated within a unique reset management module (RMM).*
*A dedicated RMM brings a lot in terms of reuse and portability. Because all vendor-specific reset elements are generated within the same module, it is easier to replace this module to target other FPGAs.*
## Global Reset Domains
Count: **7**
| Name: Origin | Graph | Asynchronous | Synchronous | Active High | Active Low | Details |
| --- | :---: | :---: | :---: | :---: | :---: | :---: |
|**RST_N**
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✗|✔|[
](reset_domains/reset_domain_1.md)|
|**inst_data_link.inst_data_link_reset.lane_reset_dlre_i**
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_2.md)|
|**inst_reset_sync_clk_from_GTY.reset_gen_rr_n**
- **inst_reset_sync_clk_from_GTY.reset_gen_rr_n**: reset_gen.vhd#56 (Flip-flop)|
|✔|✗|✗|✔|[
](reset_domains/reset_domain_3.md)|
|**inst_data_link.gen_data_in_buff(6)\.inst_data_in_buf.rst_n_fifo**
- **inst_data_link.gen_data_in_buff(6)\.inst_data_in_buf.rst_n_fifo**: data_in_buf.vhd#194 (Flip-flop)|
|✔|✗|✗|✔|[
](reset_domains/reset_domain_4.md)|
|**inst_data_link.inst_data_in_bc_buf.rst_n_fifo**
- **inst_data_link.inst_data_in_bc_buf.rst_n_fifo**: data_in_bc_buf.vhd#158 (Flip-flop)|
|✔|✗|✗|✔|[
](reset_domains/reset_domain_5.md)|
|**inst_data_link.gen_data_out_buff(3)\.inst_data_out_buff.rst_n_fifo**
- **inst_data_link.gen_data_out_buff(3)\.inst_data_out_buff.rst_n_fifo**: data_out_buf.vhd#225 (Flip-flop)|
|✔|✗|✗|✔|[
](reset_domains/reset_domain_6.md)|
|**inst_data_link.inst_data_out_bc_buf.rst_n_fifo**
- **inst_data_link.inst_data_out_bc_buf.rst_n_fifo**: data_out_bc_buf.vhd#172 (Flip-flop)|
|✔|✗|✗|✔|[
](reset_domains/reset_domain_7.md)|
*A reset domain is considered as global if:*
- *It is used in several modules.*
- *Or it is used in a single module and by at least 20% of the flip-flops in the design.*
## Local Reset Domains
Count: **49**
| Name: Origin | Graph | Asynchronous | Synchronous | Active High | Active Low | Details |
| --- | :---: | :---: | :---: | :---: | :---: | :---: |
|**AXIS_ARSTN_RX_DL**
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)|
|✔|✗|✗|✔|[
](reset_domains/reset_domain_8.md)|
|****
- **inst_phy_plus_lane.inst_lane_init_fsm.LANE_STATE**: lane_init_fsm.vhd#283 (Flip-flop)|
|✗|✗|✗|✗|[
](reset_domains/reset_domain_9.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_mid_buf.RD_DATA_VLD**: fifo_dc_drop_bad_frame.vhd#329 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_10.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_11.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_12.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_13.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_14.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_15.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_16.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_17.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_18.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_19.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_20.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_phy_plus_lane.inst_fifo_rx_data.RD_DATA_VLD**: fifo_dc.vhd#300 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_21.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.FRAME_ERR_DWI**: data_word_id_fsm.vhd#134 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.RXNOTHING_ACTIVE_DWI**: data_word_id_fsm.vhd#134 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_22.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_mid_buf_bc.RD_DATA_VLD**: fifo_dc_drop_bad_frame.vhd#329 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_23.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.trans_pol_flg**: data_err_management.vhd#269 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_24.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_phy_plus_lane.LANE_ACTIVE_DL**: phy_plus_lane.vhd#955 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_25.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_mac.req_ack_done**: data_mac.vhd#132 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_26.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.END_FRAME_DWI**: data_word_id_fsm.vhd#273 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.FRAME_ERR_DWI**: data_word_id_fsm.vhd#134 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.NEW_WORD_DWI**: data_word_id_fsm.vhd#273 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.RXNOTHING_ACTIVE_DWI**: data_word_id_fsm.vhd#134 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.TYPE_FRAME_DWI**: data_word_id_fsm.vhd#273 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_27.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_28.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.current_state**: data_word_id_fsm.vhd#134 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_29.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.current_state**: data_word_id_fsm.vhd#134 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_30.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_31.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_32.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.VC_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_33.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_phy_plus_lane.inst_fifo_rx_data.RD_DATA**: fifo_dc.vhd#300 (Flip-flop)
- **inst_phy_plus_lane.inst_fifo_rx_data.RD_DATA_VLD**: fifo_dc.vhd#300 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_34.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.current_state**: data_word_id_fsm.vhd#134 (Flip-flop)
- **inst_phy_plus_lane.inst_fifo_rx_data.RD_DATA**: fifo_dc.vhd#300 (Flip-flop)
- **inst_phy_plus_lane.inst_fifo_rx_data.RD_DATA_VLD**: fifo_dc.vhd#300 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_35.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.VC_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_36.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_37.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_38.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_39.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.VC_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_40.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.VC_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_41.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.VC_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_42.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_43.md)|
|**Complex:** ****
- **AXIS_ARSTN_TX_DL**: spacefibre_light_top.vhd#57 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_44.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.VC_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_45.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_46.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.current_state**: data_word_id_fsm.vhd#134 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_47.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.VC_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_48.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_49.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.CRC_ERR_DSCHECK**: data_seq_check.vhd#125 (Flip-flop)
- **inst_data_link.inst_data_seq_check.RXERR_DSCHECK**: data_seq_check.vhd#125 (Flip-flop)
- **inst_data_link.inst_data_seq_check.SEQ_NUM_ERR_DSCHECK**: data_seq_check.vhd#125 (Flip-flop)
- **inst_data_link.inst_data_seq_check.TYPE_FRAME_DSCHECK**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_50.md)|
|**Complex:** ****
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.END_FRAME_DWI**: data_word_id_fsm.vhd#273 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.FRAME_ERR_DWI**: data_word_id_fsm.vhd#134 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.NEW_WORD_DWI**: data_word_id_fsm.vhd#273 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.RXNOTHING_ACTIVE_DWI**: data_word_id_fsm.vhd#134 (Flip-flop)
- **inst_data_link.inst_data_word_id_fsm.TYPE_FRAME_DWI**: data_word_id_fsm.vhd#273 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_51.md)|
|**Complex:** ****
- **NACK_RST_EN**: spacefibre_light_top.vhd#75 (Port)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_52.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_53.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.VC_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_long_err**: data_crc_check.vhd#109 (Flip-flop)
- **inst_data_link.inst_data_crc_check.crc_short_err**: data_crc_check.vhd#156 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_54.md)|
|**Complex:** ****
- **AXIS_ARSTN_RX_DL**: spacefibre_light_top.vhd#64 (Port)
- **RST_N**: spacefibre_light_top.vhd#44 (Port)|
|✔|✗|✔|✗|[
](reset_domains/reset_domain_55.md)|
|**Complex:** ****
- **inst_data_link.inst_data_crc_check.END_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.SEQ_NUM_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_crc_check.TYPE_FRAME_DCCHECK**: data_crc_check.vhd#199 (Flip-flop)
- **inst_data_link.inst_data_err_management.near_end_rpf**: data_err_management.vhd#107 (Flip-flop)
- **inst_data_link.inst_data_link_reset.lane_reset_dlre_i**: data_link_reset.vhd#92 (Flip-flop)
- **inst_data_link.inst_data_seq_check.seq_num_cnt**: data_seq_check.vhd#125 (Flip-flop)|
|✗|✔|✔|✗|[
](reset_domains/reset_domain_56.md)|