Clock Domain Details

Summary

Name: Origin	Graph	Rising	Falling	Number of flip-flops using this clock domain	Number of instances using this clock domain
AXIS_ACLK_TX_DL - AXIS_ACLK_TX_DL: spacefibre_light_top.vhd#58 (Port)		✔	✗	27/1245 (2.17%)	3/103

Instances using this clock domain

Count: 3

Instance	Rising	Falling
TOP (spacefibre_light_top) > inst_data_link (data_link) > gen_data_out_buff(3).inst_data_out_buff (data_out_buff)	✔	✗
TOP (spacefibre_light_top) > inst_data_link (data_link) > gen_data_out_buff(3).inst_data_out_buff (data_out_buff) > ints_fifo_dc_axis_s (FIFO_DC_AXIS_S) > AXIS_SLAVE_inst (AXIS_SLAVE)	✔	✗
TOP (spacefibre_light_top) > inst_data_link (data_link) > gen_data_out_buff(3).inst_data_out_buff (data_out_buff) > ints_fifo_dc_axis_s (FIFO_DC_AXIS_S) > fifo_dc_inst (FIFO_DC)	✔	✗

Flip-flops using this clock domain

Count: 27

Rising-edge usage

Count: 27
fifo_dc.vhd#199
fifo_dc.vhd#222
fifo_dc.vhd#240
fifo_dc.vhd#256
fifo_dc.vhd#440
AXIS_SLAVE.vhd#56
data_out_buf.vhd#237
data_out_buf.vhd#266
data_out_buf.vhd#372
data_out_buf.vhd#521

Falling-edge usage

Count: 0

Note that there could be fewer source code locations than the number of flip-flops because several flip-flops can be inferred from the same piece of code.

Back to Clock Domains Report