Entity - phy_plus_lane

Summary

Name	Location	Description
phy_plus_lane	phy_plus_lane.vhd#41

Instantiations

Count: 1

Name	Location	Description	Details
inst_phy_plus_lane	spacefibre_light_top.vhd#802

Generics

Count: 0

Ports

Count: 37

Name	Mode	Type	Description
RST_N	in	std_logic	global reset
CLK	in	std_logic	Main clock
LANE_RESET_PPL_OUT	out	std_logic
RST_TXCLK_N	in	std_logic	Synchronous reset on clock generated by GTY PLL
CLK_TX_OUT	out	std_logic	Clock generated by manufacturer IP
RST_TX_DONE	out	std_logic	Up when internal rx reset done
CLK_GTY	in	std_logic	Clock for the extended phy layer IP
DATA_TX	in	std_logic_vector ( 31 downto 00 )	32-bit Data parallel to be send from Data-Link Layer
LANE_RESET_DL	in	std_logic	Lane reset command from Data-Link Layer
CAPABILITY_TX	in	std_logic_vector ( 07 downto 00 )	Capability field send in INIT3 control word
NEW_DATA_TX	in	std_logic	Flag new data
VALID_K_CHARAC_TX	in	std_logic_vector ( 03 downto 00 )	4-bit valid K character flags from Data-link layer
FIFO_TX_FULL	out	std_logic	FiFo TX full flag
FIFO_RX_RD_EN	in	std_logic	FiFo RX read enable flag
DATA_RX	out	std_logic_vector ( 31 downto 00 )	32-bit Data parallel to be received to Data-Link Layer
FIFO_RX_EMPTY	out	std_logic	FiFo RX empty flag
FIFO_RX_DATA_VALID	out	std_logic	FiFo RX data valid flag
VALID_K_CHARAC_RX	out	std_logic_vector ( 03 downto 00 )	4-bit valid K character flags to Data-link layer
FAR_END_CAPA_DL	out	std_logic_vector ( 07 downto 00 )	Capability field receive in INIT3 control word
LANE_ACTIVE_DL	out	std_logic	Lane Active flag for the DATA Link Layer
TX_POS	out	std_logic	Positive LVDS serial data send
TX_NEG	out	std_logic	Negative LVDS serial data send
RX_POS	in	std_logic	Positive LVDS serial data received
RX_NEG	in	std_logic	Negative LVDS serial data received
LANE_START	in	std_logic	Asserts or de-asserts LaneStart for the lane
AUTOSTART	in	std_logic	Asserts or de-asserts AutoStart for the lane
LANE_RESET	in	std_logic	Asserts or de-asserts LaneReset for the lane
PARALLEL_LOOPBACK_EN	in	std_logic	Enables or disables the parallel loopback for the lane
STANDBY_REASON	in	std_logic_vector ( 07 downto 00 )	In case of error, pauses communication
NEAR_END_SERIAL_LB_EN	in	std_logic	Enables or disables the near-end serial loopback for the lane
FAR_END_SERIAL_LB_EN	in	std_logic	Enables or disables the far-end serial loopback for the lane
LANE_STATE	out	std_logic_vector ( 03 downto 00 )	Indicates the current state of the Lane Initialization state machine in a lane
RX_ERROR_CNT	out	std_logic_vector ( 07 downto 00 )	Counter of error detected on the RX link
RX_ERROR_OVF	out	std_logic	Overflow flag of the RX_ERROR_CNT
LOSS_SIGNAL	out	std_logic	Set when no signal is received on RX link
FAR_END_CAPA	out	std_logic_vector ( 07 downto 00 )	Capabilities field (INT3 flags)
RX_POLARITY	out	std_logic	Set when the receiver polarity is inverted

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