spacefibrelight
Summary Report
Design Hierarchy
Clock Domains
Reset Domains
Clock Domain Crossings (CDC)
Reset Domain Crossings (RDC)
Finite State Machines (FSM)
Combinational Loops
spacefibrelight
Instantiation - inst_phy_plus_lane
View page source
Back to Module Report
Instantiation - inst_phy_plus_lane
Summary
Name
Architecture
Description
inst_phy_plus_lane
rtl
Generics
Count: 0
Back to Module Report