Entity - SpaceFibre_64b

Summary

Name	Location	Description
SpaceFibre_64b	hssl_SpaceFibre_64b.vhd#85

Instantiations

Count: 0

Generics

Count: 1

Name	Type	Default value	Description
LOCATION	string	“hssl0”

Ports

Count: 62

Name	Mode	Type
ckrefn	in	std_logic
ckrefp	in	std_logic
clock_o	out	std_logic
dyn_addr_i	in	std_logic_vector ( 3 downto 0 )
dyn_calibration_cs_n_i	in	std_logic
dyn_cfg_en_i	in	std_logic
dyn_lane_cs_n_i	in	std_logic_vector ( 3 downto 0 )
dyn_wdata_i	in	std_logic_vector ( 11 downto 0 )
dyn_wdata_sel_i	in	std_logic
dyn_we_n_i	in	std_logic
hssl_clock_i	in	std_logic_vector ( 3 downto 0 )
pll_lock	out	std_logic
pll_pma_lock_analog	out	std_logic
pll_pma_pwr_up_i	in	std_logic
pll_pma_rst_n_i	in	std_logic
rx0_align_sync_i	in	std_logic
rx0_busy_o	out	std_logic
rx0_ctrl_char_is_aligned_o	out	std_logic
rx0_ctrl_char_is_comma_o	out	std_logic_vector ( 7 downto 0 )
rx0_ctrl_char_is_f_o	out	std_logic_vector ( 7 downto 0 )
rx0_ctrl_char_is_k_o	out	std_logic_vector ( 7 downto 0 )
rx0_ctrl_disp_err_o	out	std_logic_vector ( 7 downto 0 )
rx0_ctrl_el_buff_stat_o	out	std_logic_vector ( 7 downto 0 )
rx0_ctrl_not_in_table_o	out	std_logic_vector ( 7 downto 0 )
rx0_ctrl_valid_realign_o	out	std_logic
rx0_data_o	out	std_logic_vector ( 63 downto 0 )
rx0_el_buff_rst_i	in	std_logic
rx0_eye_rst_i	in	std_logic
rx0_ovs_bit_sel_i	in	std_logic_vector ( 1 downto 0 )
rx0_pma_ll_fast_locked_o	out	std_logic
rx0_pma_ll_slow_locked_o	out	std_logic
rx0_pma_loss_of_signal_o	out	std_logic
rx0_pma_pll_lock_o	out	std_logic
rx0_pma_pll_lock_track_o	out	std_logic
rx0_pma_pwr_up_i	in	std_logic
rx0_pma_rst_n_i	in	std_logic
rx0_replace_en_i	in	std_logic
rx0_rst_n_i	in	std_logic
rx0_test_o	out	std_logic_vector ( 7 downto 0 )
rx0n	in	std_logic
rx0p	in	std_logic
rx1n	in	std_logic
rx1p	in	std_logic
rx2n	in	std_logic
rx2p	in	std_logic
rx3n	in	std_logic
rx3p	in	std_logic
tx0_busy_o	out	std_logic
tx0_clk_ena_i	in	std_logic
tx0_clk_o	out	std_logic
tx0_ctrl_char_is_k_i	in	std_logic_vector ( 7 downto 0 )
tx0_ctrl_driver_pwrdwn_n_i	in	std_logic
tx0_data_i	in	std_logic_vector ( 63 downto 0 )
tx0_rst_n_i	in	std_logic
tx0n	out	std_logic
tx0p	out	std_logic
tx1n	out	std_logic
tx1p	out	std_logic
tx2n	out	std_logic
tx2p	out	std_logic
tx3n	out	std_logic
tx3p	out	std_logic

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