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FSM #9: current_state

Summary

Name

Location

Graph

Reset State

States

Input Signals

Output Signals

current_state

lane_init_fsm.vhd#98

Open FSM Diagram

CLEAR_LINE_ST

Count: 10
ACTIVE_ST
CLEAR_LINE_ST
CONNECTED_ST
CONNECTING_ST
DISABLED_ST
INVERT_RX_POLARITY_ST
LOSS_OF_SIGNAL_ST
PREPARE_STANDBY_ST
STARTED_ST
WAIT_ST

20

39

Input Signals

Count: 20

Name

Declaration

AUTOSTART

lane_init_fsm.vhd#71

LANE_RESET

lane_init_fsm.vhd#72

LANE_RESET_DL

lane_init_fsm.vhd#37

LANE_START

lane_init_fsm.vhd#70

LOST_SIGNAL_X32

lane_init_fsm.vhd#59

NO_SIGNAL

lane_init_fsm.vhd#40

RX_ERROR_OVF

lane_init_fsm.vhd#75

STANDBY_SIGNAL_X32

lane_init_fsm.vhd#58

clear_line_done

lane_init_fsm.vhd#106

comma_k287_rxed_r

lane_init_fsm.vhd#166

init1_rxed

lane_init_fsm.vhd#145

init2_rxed_x3

lane_init_fsm.vhd#155

init3_rxed_x3

lane_init_fsm.vhd#164

init_timeout_reaches

lane_init_fsm.vhd#130

inv_init1_rxed_x3

lane_init_fsm.vhd#147

inv_init2_rxed_x3

lane_init_fsm.vhd#156

lost_signal_x3

lane_init_fsm.vhd#135

rx_error_cnt_ovf_i

lane_init_fsm.vhd#122

rxed_1023_word

lane_init_fsm.vhd#173

standby_signal_x3

lane_init_fsm.vhd#140

Output Signals

Count: 39

Name

Declaration

CDR

lane_init_fsm.vhd#52

ENABLE_TRANSM_DATA

lane_init_fsm.vhd#64

INVERT_RX_BITS

lane_init_fsm.vhd#54

LANE_STATE

lane_init_fsm.vhd#73

LOST_CAUSE

lane_init_fsm.vhd#67

NO_SIGNAL_DETECTION_ENABLED

lane_init_fsm.vhd#55

RECEIVER_DISABLED

lane_init_fsm.vhd#51

RX_ERROR_CNT

lane_init_fsm.vhd#74

RX_ERROR_OVF

lane_init_fsm.vhd#75

SEND_32_LOSS_SIGNAL_CTRL_WORDS

lane_init_fsm.vhd#66

SEND_32_STANDBY_CTRL_WORDS

lane_init_fsm.vhd#65

SEND_INIT1_CTRL_WORD

lane_init_fsm.vhd#61

SEND_INIT2_CTRL_WORD

lane_init_fsm.vhd#62

SEND_INIT3_CTRL_WORD

lane_init_fsm.vhd#63

SEND_RXERR

lane_init_fsm.vhd#53

TRANSMITTER_DISABLED

lane_init_fsm.vhd#60

cdr_i

lane_init_fsm.vhd#107

clear_line_cnt

lane_init_fsm.vhd#105

clear_line_done

lane_init_fsm.vhd#106

current_state_r

lane_init_fsm.vhd#99

enable_init_cnt

lane_init_fsm.vhd#108

init1_rxed

lane_init_fsm.vhd#145

init2_rxed

lane_init_fsm.vhd#157

init2_rxed_cnt

lane_init_fsm.vhd#153

init2_rxed_x3

lane_init_fsm.vhd#155

init3_rxed_cnt

lane_init_fsm.vhd#163

init3_rxed_x3

lane_init_fsm.vhd#164

inv_init1_rxed_cnt

lane_init_fsm.vhd#144

inv_init1_rxed_x3

lane_init_fsm.vhd#147

inv_init2_rxed_cnt

lane_init_fsm.vhd#154

inv_init2_rxed_x3

lane_init_fsm.vhd#156

loss_signal_x3_cnt

lane_init_fsm.vhd#134

lost_signal_x3

lane_init_fsm.vhd#135

rx_error_cnt_i

lane_init_fsm.vhd#121

rx_error_cnt_ovf_i

lane_init_fsm.vhd#122

rxed_1023_word

lane_init_fsm.vhd#173

rxed_1023_word_cnt

lane_init_fsm.vhd#172

standby_signal_x3

lane_init_fsm.vhd#140

standby_signal_x3_cnt

lane_init_fsm.vhd#139

Transition table

From

To

Input Control Signals

CLEAR_LINE_ST

CLEAR_LINE_ST

clear_line_done: lane_init_fsm.vhd#106

CLEAR_LINE_ST

DISABLED_ST

clear_line_done: lane_init_fsm.vhd#106

DISABLED_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37

DISABLED_ST

DISABLED_ST

AUTOSTART: lane_init_fsm.vhd#71
LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LANE_START: lane_init_fsm.vhd#70

DISABLED_ST

WAIT_ST

AUTOSTART: lane_init_fsm.vhd#71
LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LANE_START: lane_init_fsm.vhd#70

WAIT_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37

WAIT_ST

DISABLED_ST

AUTOSTART: lane_init_fsm.vhd#71
LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LANE_START: lane_init_fsm.vhd#70

WAIT_ST

WAIT_ST

AUTOSTART: lane_init_fsm.vhd#71
LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LANE_START: lane_init_fsm.vhd#70
NO_SIGNAL: lane_init_fsm.vhd#40

WAIT_ST

STARTED_ST

AUTOSTART: lane_init_fsm.vhd#71
LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LANE_START: lane_init_fsm.vhd#70
NO_SIGNAL: lane_init_fsm.vhd#40

STARTED_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

STARTED_ST

STARTED_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
init_timeout_reaches: lane_init_fsm.vhd#130
inv_init1_rxed_x3: lane_init_fsm.vhd#147
inv_init2_rxed_x3: lane_init_fsm.vhd#156
lost_signal_x3: lane_init_fsm.vhd#135
rxed_1023_word: lane_init_fsm.vhd#173
standby_signal_x3: lane_init_fsm.vhd#140

STARTED_ST

INVERT_RX_POLARITY_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
init_timeout_reaches: lane_init_fsm.vhd#130
inv_init1_rxed_x3: lane_init_fsm.vhd#147
inv_init2_rxed_x3: lane_init_fsm.vhd#156
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

STARTED_ST

CONNECTING_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
init_timeout_reaches: lane_init_fsm.vhd#130
inv_init1_rxed_x3: lane_init_fsm.vhd#147
inv_init2_rxed_x3: lane_init_fsm.vhd#156
lost_signal_x3: lane_init_fsm.vhd#135
rxed_1023_word: lane_init_fsm.vhd#173
standby_signal_x3: lane_init_fsm.vhd#140

INVERT_RX_POLARITY_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

INVERT_RX_POLARITY_ST

INVERT_RX_POLARITY_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
rxed_1023_word: lane_init_fsm.vhd#173
standby_signal_x3: lane_init_fsm.vhd#140

INVERT_RX_POLARITY_ST

CONNECTING_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
rxed_1023_word: lane_init_fsm.vhd#173
standby_signal_x3: lane_init_fsm.vhd#140

CONNECTING_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

CONNECTING_ST

CONNECTING_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
init2_rxed_x3: lane_init_fsm.vhd#155
init3_rxed_x3: lane_init_fsm.vhd#164
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

CONNECTING_ST

CONNECTED_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
init2_rxed_x3: lane_init_fsm.vhd#155
init3_rxed_x3: lane_init_fsm.vhd#164
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

CONNECTED_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
comma_k287_rxed_r: lane_init_fsm.vhd#166
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

CONNECTED_ST

CONNECTED_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
comma_k287_rxed_r: lane_init_fsm.vhd#166
init3_rxed_x3: lane_init_fsm.vhd#164
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

CONNECTED_ST

ACTIVE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
NO_SIGNAL: lane_init_fsm.vhd#40
comma_k287_rxed_r: lane_init_fsm.vhd#166
init3_rxed_x3: lane_init_fsm.vhd#164
init_timeout_reaches: lane_init_fsm.vhd#130
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

ACTIVE_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

ACTIVE_ST

ACTIVE_ST

AUTOSTART: lane_init_fsm.vhd#71
LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LANE_START: lane_init_fsm.vhd#70
NO_SIGNAL: lane_init_fsm.vhd#40
RX_ERROR_OVF: lane_init_fsm.vhd#75
init1_rxed: lane_init_fsm.vhd#145
lost_signal_x3: lane_init_fsm.vhd#135
rx_error_cnt_ovf_i: lane_init_fsm.vhd#122
standby_signal_x3: lane_init_fsm.vhd#140

ACTIVE_ST

LOSS_OF_SIGNAL_ST

AUTOSTART: lane_init_fsm.vhd#71
LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LANE_START: lane_init_fsm.vhd#70
NO_SIGNAL: lane_init_fsm.vhd#40
RX_ERROR_OVF: lane_init_fsm.vhd#75
init1_rxed: lane_init_fsm.vhd#145
lost_signal_x3: lane_init_fsm.vhd#135
rx_error_cnt_ovf_i: lane_init_fsm.vhd#122
standby_signal_x3: lane_init_fsm.vhd#140

ACTIVE_ST

PREPARE_STANDBY_ST

AUTOSTART: lane_init_fsm.vhd#71
LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LANE_START: lane_init_fsm.vhd#70
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

LOSS_OF_SIGNAL_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LOST_SIGNAL_X32: lane_init_fsm.vhd#59
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

LOSS_OF_SIGNAL_ST

LOSS_OF_SIGNAL_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
LOST_SIGNAL_X32: lane_init_fsm.vhd#59
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

PREPARE_STANDBY_ST

CLEAR_LINE_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
STANDBY_SIGNAL_X32: lane_init_fsm.vhd#58
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

PREPARE_STANDBY_ST

PREPARE_STANDBY_ST

LANE_RESET: lane_init_fsm.vhd#72
LANE_RESET_DL: lane_init_fsm.vhd#37
STANDBY_SIGNAL_X32: lane_init_fsm.vhd#58
lost_signal_x3: lane_init_fsm.vhd#135
standby_signal_x3: lane_init_fsm.vhd#140

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