FSM #13: current_state

Summary

Graph

Name

Location

Reset State

States

Unreachable States

Deadlock States

Livelock States

Input Signals

Output Signals

current_state

data_link_reset.vhd#69

CONF_RST_ST

Count: 4
CHECK_FAR_END_RST_ST
CONF_RST_ST
LINK_INIT_ST
NEAR_END_RST_ST

Count: 0

8

7

Input Signals

Count: 8

Name	Declaration
FAR_END_CAPA_PPL	data_link_reset.vhd#49
INTERFACE_RESET_MIB	data_link_reset.vhd#52
LANE_ACTIVE_PPL	data_link_reset.vhd#48
LINK_RESET_DERRM	data_link_reset.vhd#44
LINK_RESET_DIBUF	data_link_reset.vhd#42
LINK_RESET_MIB	data_link_reset.vhd#53
cnt_link_reset	data_link_reset.vhd#70
lane_active_ppl_r	data_link_reset.vhd#71

Output Signals

Count: 7

Name	Declaration
LANE_RESET_DLRE	data_link_reset.vhd#46
LINK_RESET_DLRE	data_link_reset.vhd#40
NEAR_END_CAPA_DLRE	data_link_reset.vhd#47
RESET_PARAM_DLRE	data_link_reset.vhd#51
cnt_link_reset	data_link_reset.vhd#70
lane_reset_dlre_i	data_link_reset.vhd#73
link_reset_dlre_i	data_link_reset.vhd#72

Transitions

Count: 15

From	To	Input Control Signals
CHECK_FAR_END_RST_ST	CHECK_FAR_END_RST_ST	FAR_END_CAPA_PPL: data_link_reset.vhd#49 INTERFACE_RESET_MIB: data_link_reset.vhd#52 LANE_ACTIVE_PPL: data_link_reset.vhd#48 LINK_RESET_DERRM: data_link_reset.vhd#44 LINK_RESET_DIBUF: data_link_reset.vhd#42 LINK_RESET_MIB: data_link_reset.vhd#53 lane_active_ppl_r: data_link_reset.vhd#71
CHECK_FAR_END_RST_ST	CONF_RST_ST	INTERFACE_RESET_MIB: data_link_reset.vhd#52
CHECK_FAR_END_RST_ST	LINK_INIT_ST	FAR_END_CAPA_PPL: data_link_reset.vhd#49 INTERFACE_RESET_MIB: data_link_reset.vhd#52 LANE_ACTIVE_PPL: data_link_reset.vhd#48 LINK_RESET_DERRM: data_link_reset.vhd#44 LINK_RESET_DIBUF: data_link_reset.vhd#42 LINK_RESET_MIB: data_link_reset.vhd#53 lane_active_ppl_r: data_link_reset.vhd#71
CHECK_FAR_END_RST_ST	NEAR_END_RST_ST	INTERFACE_RESET_MIB: data_link_reset.vhd#52 LINK_RESET_DERRM: data_link_reset.vhd#44 LINK_RESET_DIBUF: data_link_reset.vhd#42 LINK_RESET_MIB: data_link_reset.vhd#53
CONF_RST_ST	CONF_RST_ST	cnt_link_reset: data_link_reset.vhd#70
CONF_RST_ST	NEAR_END_RST_ST	cnt_link_reset: data_link_reset.vhd#70
LINK_INIT_ST	CONF_RST_ST	INTERFACE_RESET_MIB: data_link_reset.vhd#52
LINK_INIT_ST	LINK_INIT_ST	FAR_END_CAPA_PPL: data_link_reset.vhd#49 INTERFACE_RESET_MIB: data_link_reset.vhd#52 LANE_ACTIVE_PPL: data_link_reset.vhd#48 LINK_RESET_DERRM: data_link_reset.vhd#44 LINK_RESET_DIBUF: data_link_reset.vhd#42 LINK_RESET_MIB: data_link_reset.vhd#53 lane_active_ppl_r: data_link_reset.vhd#71
LINK_INIT_ST	NEAR_END_RST_ST	FAR_END_CAPA_PPL: data_link_reset.vhd#49 INTERFACE_RESET_MIB: data_link_reset.vhd#52 LANE_ACTIVE_PPL: data_link_reset.vhd#48 LINK_RESET_DERRM: data_link_reset.vhd#44 LINK_RESET_DIBUF: data_link_reset.vhd#42 LINK_RESET_MIB: data_link_reset.vhd#53 lane_active_ppl_r: data_link_reset.vhd#71
LINK_INIT_ST	NEAR_END_RST_ST	FAR_END_CAPA_PPL: data_link_reset.vhd#49 INTERFACE_RESET_MIB: data_link_reset.vhd#52 LANE_ACTIVE_PPL: data_link_reset.vhd#48 LINK_RESET_MIB: data_link_reset.vhd#53 lane_active_ppl_r: data_link_reset.vhd#71
LINK_INIT_ST	NEAR_END_RST_ST	INTERFACE_RESET_MIB: data_link_reset.vhd#52 LINK_RESET_MIB: data_link_reset.vhd#53
NEAR_END_RST_ST	CHECK_FAR_END_RST_ST	INTERFACE_RESET_MIB: data_link_reset.vhd#52 LINK_RESET_MIB: data_link_reset.vhd#53 cnt_link_reset: data_link_reset.vhd#70
NEAR_END_RST_ST	CONF_RST_ST	INTERFACE_RESET_MIB: data_link_reset.vhd#52
NEAR_END_RST_ST	NEAR_END_RST_ST	INTERFACE_RESET_MIB: data_link_reset.vhd#52 LINK_RESET_MIB: data_link_reset.vhd#53
NEAR_END_RST_ST	NEAR_END_RST_ST	INTERFACE_RESET_MIB: data_link_reset.vhd#52 LINK_RESET_MIB: data_link_reset.vhd#53 cnt_link_reset: data_link_reset.vhd#70