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FSM #12: current_state_pll_pma

Summary

Name

Location

Graph

Reset State

States

Input Signals

Output Signals

current_state_pll_pma

ppl_64_init_hssl.vhd#85

Open FSM Diagram

PMA_PLL_POWER_UP_ST

Count: 4
PMA_PLL_LOCK_ST
PMA_PLL_POWER_UP_ST
PMA_PLL_RST_PULSE_ST
TX_POWER_UP_ST

0

4


Input Signals

Count: 0

Name

Declaration

Output Signals

Count: 4

Name

Declaration

PLL_PMA_PWR_UP_PLIH

ppl_64_init_hssl.vhd#41

PLL_PMA_RST_N_PLIH

ppl_64_init_hssl.vhd#43

TX_DRIVER_PWRDWN_N_PLIH

ppl_64_init_hssl.vhd#42

pma_pll_seq_end

ppl_64_init_hssl.vhd#88

Transition table

From

To

Input Control Signals

PMA_PLL_POWER_UP_ST

TX_POWER_UP_ST

TX_POWER_UP_ST

PMA_PLL_RST_PULSE_ST

PMA_PLL_RST_PULSE_ST

PMA_PLL_LOCK_ST

PMA_PLL_LOCK_ST

PMA_PLL_LOCK_ST


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