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FSM #10: current_state_tx_pcs

Summary

Name	Location	Graph	Reset State	States	Input Signals	Output Signals
current_state_tx_pcs	ppl_64_init_hssl.vhd#87		IDLE_ST	Count: 3 IDLE_ST TX_PULSE_ST TX_STARTED_ST	2	1

Input Signals

Count: 2

Name	Declaration
TRANSMITTER_DISABLED_PLIF	ppl_64_init_hssl.vhd#39
pma_pll_seq_end	ppl_64_init_hssl.vhd#88

Output Signals

Count: 1

Name	Declaration
TX_RST_N_PLIH	ppl_64_init_hssl.vhd#45

Transition table

From	To	Input Control Signals
IDLE_ST	IDLE_ST	TRANSMITTER_DISABLED_PLIF: ppl_64_init_hssl.vhd#39 pma_pll_seq_end: ppl_64_init_hssl.vhd#88
IDLE_ST	TX_PULSE_ST	TRANSMITTER_DISABLED_PLIF: ppl_64_init_hssl.vhd#39 pma_pll_seq_end: ppl_64_init_hssl.vhd#88
TX_PULSE_ST	TX_STARTED_ST
TX_STARTED_ST	TX_STARTED_ST

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