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Entity - rx_sync_fsm

Summary

Name

Location

Description

rx_sync_fsm

rx_sync_fsm.vhd#32

Instantiations

Count: 1

Name

Location

Description

Details

inst_rx_sync_fsm

phy_plus_lane.vhd#860

View Instantiation Details

Generics

Count: 0

Ports

Count: 15

Name

Mode

Type

Description

CLK_SYS

in

std_logic

MAIN CLOCK

RST_N

in

std_logic

global reset

CLK

in

std_logic

Clock generated by GTY IP

LANE_RESET_DL

in

std_logic

Lane reset command from Data-Link Layer.

DATA_RX_TO_LCWD

out

std_logic_vector ( 31 downto 00 )

32-bit data to lane_ctrl_word_detect

VALID_K_CARAC_TO_LCWD

out

std_logic_vector ( 03 downto 00 )

4-bit valid K character flags to lane_ctrl_word_detect

DATA_RDY_TO_LCWD

out

std_logic

Data valid flag to lane_ctrl_word_detect

DATA_RX_FROM_IP

in

std_logic_vector ( 31 downto 00 )

32-bit data from GTY IP

VALID_K_CARAC_FROM_IP

in

std_logic_vector ( 03 downto 00 )

4-bit valid K character flags from GTY IP

DATA_RDY_FROM_IP

in

std_logic

Data valid flag from GTY IP

INVALID_CHAR_FROM_IP

in

std_logic_vector ( 03 downto 00 )

Invalid character flags from GTY IP

DISPARITY_ERR_FROM_IP

in

std_logic_vector ( 03 downto 00 )

Disparity error flags from GTY IP

RX_WORD_REALIGN_FROM_IP

in

std_logic

RX word realign from GTY IP

COMMA_DET_FROM_IP

in

std_logic

Flag indicates that a comma is detected on the word receive

LANE_RESET

in

std_logic

Asserts or de-asserts LaneReset for the lane


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