# gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising) => CLK (rising) |Graph|Origin Clock Domain|Target Clock Domain|Number of CDCs| |:---:|---|---:|---| |
|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|CLK (rising)|19|Graph| ## CDCs ### Summary |ID|Graph|Origin Signal|Target Signal|Details| |---:|:---:|---|---|:---:| |6|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.flush_ack_wr`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_rd`|Details| |19|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_rd_gray`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_rd_in_wr`|Details| |137|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_lane_init_fsm.RECEIVER_DISABLED_PLIF`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.current_state_rx_pll_pma`|Details| |138|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_lane_init_fsm.cdr_i`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.current_state_rx_pll_pma`|Details| |184|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.flush_ack_inv_rd`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.flush_ack_inv_rd_r`|Details| |188|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.flush_ack_inv_rd`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.flush_ack_rd`|Details| |213|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_wr_gray`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_wr_in_rd`|Details| |214|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.flush_ack_wr`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_wr_in_rd`|Details| |261|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.flush_ack_wr`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.RD_DATA_VLD`|Details| |267|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.RD_DATA_VLD`|Details| |268|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_inv`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_inv_rd`|Details| |283|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_rd`|Details| |284|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_inv`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_rd`|Details| |288|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_wr_gray`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_wr_in_rd`|Details| |289|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_wr_in_rd`|Details| |300|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.flush_ack_wr`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.empty`|Details| |303|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.empty`|Details| |316|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_lane_init_fsm.TRANSMITTER_DISABLED_PLIF`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.current_state_tx_pcs`|Details| |354|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_rd_gray`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_rd_in_wr`|Details| ### CDC #6 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.flush_ack_wr`
Usage:
- fifo_dc.vhd#445
- fifo_dc.vhd#462
- fifo_dc.vhd#471
- fifo_dc.vhd#473|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_rd`
Usage:
- fifo_dc.vhd#322
- fifo_dc.vhd#328
- fifo_dc.vhd#332|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#321| ### CDC #19 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_rd_gray`
Usage:
- fifo_dc.vhd#363
- fifo_dc.vhd#365|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#362| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_rd_in_wr`
Usage:
- fifo_dc.vhd#223
- fifo_dc.vhd#226
- fifo_dc.vhd#228|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#222| ### CDC #137 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_lane_init_fsm.RECEIVER_DISABLED_PLIF`
Usage:
- ppl_64_lane_init_fsm.vhd#298
- ppl_64_lane_init_fsm.vhd#318
- ppl_64_lane_init_fsm.vhd#346
- ppl_64_lane_init_fsm.vhd#352|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_lane_init_fsm (ppl_64_lane_init_fsm) > ppl_64_lane_init_fsm.vhd#295| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.current_state_rx_pll_pma`
Usage:
- ppl_64_init_hssl.vhd#136
- ppl_64_init_hssl.vhd#143
- ppl_64_init_hssl.vhd#146
- ppl_64_init_hssl.vhd#151
- ppl_64_init_hssl.vhd#155
- ppl_64_init_hssl.vhd#158
- ppl_64_init_hssl.vhd#162
- ppl_64_init_hssl.vhd#168|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_ppl_64_init_hssl (ppl_64_init_hssl) > ppl_64_init_hssl.vhd#135| ### CDC #138 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_lane_init_fsm.cdr_i`
Usage:
- ppl_64_lane_init_fsm.vhd#300
- ppl_64_lane_init_fsm.vhd#320
- ppl_64_lane_init_fsm.vhd#347
- ppl_64_lane_init_fsm.vhd#354
- ppl_64_lane_init_fsm.vhd#362
- ppl_64_lane_init_fsm.vhd#371|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_lane_init_fsm (ppl_64_lane_init_fsm) > ppl_64_lane_init_fsm.vhd#295| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.current_state_rx_pll_pma`
Usage:
- ppl_64_init_hssl.vhd#136
- ppl_64_init_hssl.vhd#143
- ppl_64_init_hssl.vhd#146
- ppl_64_init_hssl.vhd#151
- ppl_64_init_hssl.vhd#155
- ppl_64_init_hssl.vhd#158
- ppl_64_init_hssl.vhd#162
- ppl_64_init_hssl.vhd#168|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_ppl_64_init_hssl (ppl_64_init_hssl) > ppl_64_init_hssl.vhd#135| ### CDC #184 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.flush_ack_inv_rd`
Usage:
- fifo_dc.vhd#324
- fifo_dc.vhd#329|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#321| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.flush_ack_inv_rd_r`
Usage:
- fifo_dc.vhd#444
- fifo_dc.vhd#453
- fifo_dc.vhd#466|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#440| ### CDC #188 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.flush_ack_inv_rd`
Usage:
- fifo_dc.vhd#324
- fifo_dc.vhd#329|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#321| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.flush_ack_rd`
Usage:
- fifo_dc.vhd#446
- fifo_dc.vhd#467
- fifo_dc.vhd#471
- fifo_dc.vhd#472|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#440| ### CDC #213 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_wr_gray`
Usage:
- fifo_dc.vhd#241
- fifo_dc.vhd#243|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#240| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_wr_in_rd`
Usage:
- fifo_dc.vhd#345
- fifo_dc.vhd#348
- fifo_dc.vhd#350|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#344| ### CDC #214 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.flush_ack_wr`
Usage:
- fifo_dc.vhd#445
- fifo_dc.vhd#462
- fifo_dc.vhd#471
- fifo_dc.vhd#473|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_wr_in_rd`
Usage:
- fifo_dc.vhd#345
- fifo_dc.vhd#348
- fifo_dc.vhd#350|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#344| ### CDC #261 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.flush_ack_wr`
Usage:
- fifo_dc.vhd#445
- fifo_dc.vhd#462
- fifo_dc.vhd#471
- fifo_dc.vhd#473|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.RD_DATA_VLD`
Usage:
- fifo_dc.vhd#301
- fifo_dc.vhd#304
- fifo_dc.vhd#308|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#300| ### CDC #267 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.RD_DATA_VLD`
Usage:
- fifo_dc.vhd#301
- fifo_dc.vhd#304
- fifo_dc.vhd#308|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#300| ### CDC #268 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_inv`
Usage:
- fifo_dc.vhd#442
- fifo_dc.vhd#457|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_inv_rd`
Usage:
- fifo_dc.vhd#323
- fifo_dc.vhd#326
- fifo_dc.vhd#327|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#321| ### CDC #283 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_rd`
Usage:
- fifo_dc.vhd#322
- fifo_dc.vhd#328
- fifo_dc.vhd#332|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#321| ### CDC #284 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_inv`
Usage:
- fifo_dc.vhd#442
- fifo_dc.vhd#457|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_rd`
Usage:
- fifo_dc.vhd#322
- fifo_dc.vhd#328
- fifo_dc.vhd#332|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#321| ### CDC #288 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_wr_gray`
Usage:
- fifo_dc.vhd#241
- fifo_dc.vhd#243|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#240| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_wr_in_rd`
Usage:
- fifo_dc.vhd#345
- fifo_dc.vhd#348
- fifo_dc.vhd#350|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#344| ### CDC #289 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_wr_in_rd`
Usage:
- fifo_dc.vhd#345
- fifo_dc.vhd#348
- fifo_dc.vhd#350|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#344| ### CDC #300 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.flush_ack_wr`
Usage:
- fifo_dc.vhd#445
- fifo_dc.vhd#462
- fifo_dc.vhd#471
- fifo_dc.vhd#473|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.empty`
Usage:
- fifo_dc.vhd#379
- fifo_dc.vhd#384
- fifo_dc.vhd#386|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#378| ### CDC #303 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.empty`
Usage:
- fifo_dc.vhd#379
- fifo_dc.vhd#384
- fifo_dc.vhd#386|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#378| ### CDC #316 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_lane_init_fsm.TRANSMITTER_DISABLED_PLIF`
Usage:
- ppl_64_lane_init_fsm.vhd#299
- ppl_64_lane_init_fsm.vhd#319
- ppl_64_lane_init_fsm.vhd#345
- ppl_64_lane_init_fsm.vhd#353
- ppl_64_lane_init_fsm.vhd#361
- ppl_64_lane_init_fsm.vhd#370|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_lane_init_fsm (ppl_64_lane_init_fsm) > ppl_64_lane_init_fsm.vhd#295| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.current_state_tx_pcs`
Usage:
- ppl_64_init_hssl.vhd#180
- ppl_64_init_hssl.vhd#185
- ppl_64_init_hssl.vhd#188
- ppl_64_init_hssl.vhd#192
- ppl_64_init_hssl.vhd#198|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_ppl_64_init_hssl (ppl_64_init_hssl) > ppl_64_init_hssl.vhd#179| ### CDC #354 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_rd_gray`
Usage:
- fifo_dc.vhd#363
- fifo_dc.vhd#365|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#362| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_rd_in_wr`
Usage:
- fifo_dc.vhd#223
- fifo_dc.vhd#226
- fifo_dc.vhd#228|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#222|