# CLK (rising) => gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising) |Graph|Origin Clock Domain|Target Clock Domain|Number of CDCs| |:---:|---|---:|---| |
|CLK (rising)|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|23|Graph| ## CDCs ### Summary |ID|Graph|Origin Signal|Target Signal|Details| |---:|:---:|---|---|:---:| |5|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.HSSL_RESET_DONE_PLIH`|`inst_reset_sync_clk_from_GTY.reset_gen_rr_n`|Details| |25|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.RD_DATA_VLD`|Details| |66|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.empty`|Details| |77|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_rd`|Details| |92|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_wr_gray`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_wr_in_rd`|Details| |93|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_wr_in_rd`|Details| |101|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.RD_DATA_VLD`|Details| |155|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.empty`|Details| |227|Graph|`inst_mux_tx.LANE_RESET_MUX`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_rx_sync_fsm.current_state`|Details| |276|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_inv`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_inv_rd`|Details| |277|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_rd`|Details| |278|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_inv`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_rd`|Details| |290|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_inv_rd`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_rd`|Details| |291|Graph|`inst_mux_tx.LANE_RESET_MUX`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_rd`|Details| |292|Graph|`inst_mux_tx.LANE_RESET_MUX`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_wr`|Details| |302|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_rd_gray`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_rd_in_wr`|Details| |305|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_inv_rd`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_inv_rd_r`|Details| |346|Graph|`inst_mux_tx.LANE_RESET_MUX`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`|Details| |349|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_wr_gray`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_wr_in_rd`|Details| |350|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_req`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_wr_in_rd`|Details| |360|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_rd_gray`|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_rd_in_wr`|Details| |362|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.HSSL_RESET_DONE_PLIH`|`inst_reset_sync_clk_from_GTY.reset_gen_r_n`|Details| |364|Graph|`gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.HSSL_RESET_DONE_PLIH`|`inst_reset_sync_clk_from_GTY.rst_tx_done_r`|Details| ### CDC #5 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.HSSL_RESET_DONE_PLIH`
Usage:
- ppl_64_init_hssl.vhd#209
- ppl_64_init_hssl.vhd#213
- ppl_64_init_hssl.vhd#215|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_ppl_64_init_hssl (ppl_64_init_hssl) > ppl_64_init_hssl.vhd#208| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `inst_reset_sync_clk_from_GTY.reset_gen_rr_n`
Usage:
- reset_gen.vhd#58
- reset_gen.vhd#63
- reset_gen.vhd#69
- reset_gen.vhd#72|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > inst_reset_sync_clk_from_GTY (reset_gen) > reset_gen.vhd#56| ### CDC #25 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.RD_DATA_VLD`
Usage:
- fifo_dc.vhd#301
- fifo_dc.vhd#304
- fifo_dc.vhd#308|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#300| ### CDC #66 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.empty`
Usage:
- fifo_dc.vhd#379
- fifo_dc.vhd#384
- fifo_dc.vhd#386|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#378| ### CDC #77 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_rd`
Usage:
- fifo_dc.vhd#322
- fifo_dc.vhd#328
- fifo_dc.vhd#332|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#321| ### CDC #92 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_wr_gray`
Usage:
- fifo_dc.vhd#241
- fifo_dc.vhd#243|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#240| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_wr_in_rd`
Usage:
- fifo_dc.vhd#345
- fifo_dc.vhd#348
- fifo_dc.vhd#350|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#344| ### CDC #93 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.ptr_wr_in_rd`
Usage:
- fifo_dc.vhd#345
- fifo_dc.vhd#348
- fifo_dc.vhd#350|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#344| ### CDC #101 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.RD_DATA_VLD`
Usage:
- fifo_dc.vhd#301
- fifo_dc.vhd#304
- fifo_dc.vhd#308|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#300| ### CDC #155 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_in_ctrl.empty`
Usage:
- fifo_dc.vhd#379
- fifo_dc.vhd#384
- fifo_dc.vhd#386|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_in_ctrl (FIFO_DC) > fifo_dc.vhd#378| ### CDC #227 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `inst_mux_tx.LANE_RESET_MUX`
Usage:
- mux_tx.vhd#82
- mux_tx.vhd#90
- mux_tx.vhd#97|CLK (rising)|TOP (spacefibre_light_top) > inst_mux_tx (mux_tx) > mux_tx.vhd#75| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_rx_sync_fsm.current_state`
Usage:
- ppl_64_rx_sync_fsm.vhd#101
- ppl_64_rx_sync_fsm.vhd#104
- ppl_64_rx_sync_fsm.vhd#106
- ppl_64_rx_sync_fsm.vhd#108
- ppl_64_rx_sync_fsm.vhd#111
- ppl_64_rx_sync_fsm.vhd#113
- ppl_64_rx_sync_fsm.vhd#115
- ppl_64_rx_sync_fsm.vhd#117
- ppl_64_rx_sync_fsm.vhd#93
- ppl_64_rx_sync_fsm.vhd#97
- ppl_64_rx_sync_fsm.vhd#99|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_ppl_64_rx_sync_fsm (ppl_64_rx_sync_fsm) > ppl_64_rx_sync_fsm.vhd#92| ### CDC #276 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_inv`
Usage:
- fifo_dc.vhd#442
- fifo_dc.vhd#457|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_inv_rd`
Usage:
- fifo_dc.vhd#323
- fifo_dc.vhd#326
- fifo_dc.vhd#327|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#321| ### CDC #277 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_rd`
Usage:
- fifo_dc.vhd#322
- fifo_dc.vhd#328
- fifo_dc.vhd#332|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#321| ### CDC #278 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_inv`
Usage:
- fifo_dc.vhd#442
- fifo_dc.vhd#457|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_rd`
Usage:
- fifo_dc.vhd#322
- fifo_dc.vhd#328
- fifo_dc.vhd#332|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#321| ### CDC #290 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_inv_rd`
Usage:
- fifo_dc.vhd#324
- fifo_dc.vhd#329|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#321| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_rd`
Usage:
- fifo_dc.vhd#446
- fifo_dc.vhd#467
- fifo_dc.vhd#471
- fifo_dc.vhd#472|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| ### CDC #291 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `inst_mux_tx.LANE_RESET_MUX`
Usage:
- mux_tx.vhd#82
- mux_tx.vhd#90
- mux_tx.vhd#97|CLK (rising)|TOP (spacefibre_light_top) > inst_mux_tx (mux_tx) > mux_tx.vhd#75| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_rd`
Usage:
- fifo_dc.vhd#446
- fifo_dc.vhd#467
- fifo_dc.vhd#471
- fifo_dc.vhd#472|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| ### CDC #292 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `inst_mux_tx.LANE_RESET_MUX`
Usage:
- mux_tx.vhd#82
- mux_tx.vhd#90
- mux_tx.vhd#97|CLK (rising)|TOP (spacefibre_light_top) > inst_mux_tx (mux_tx) > mux_tx.vhd#75| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_wr`
Usage:
- fifo_dc.vhd#445
- fifo_dc.vhd#462
- fifo_dc.vhd#471
- fifo_dc.vhd#473|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| ### CDC #302 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_rd_gray`
Usage:
- fifo_dc.vhd#363
- fifo_dc.vhd#365|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#362| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.ptr_rd_in_wr`
Usage:
- fifo_dc.vhd#223
- fifo_dc.vhd#226
- fifo_dc.vhd#228|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#222| ### CDC #305 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_inv_rd`
Usage:
- fifo_dc.vhd#324
- fifo_dc.vhd#329|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#321| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.flush_ack_inv_rd_r`
Usage:
- fifo_dc.vhd#444
- fifo_dc.vhd#453
- fifo_dc.vhd#466|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| ### CDC #346 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `inst_mux_tx.LANE_RESET_MUX`
Usage:
- mux_tx.vhd#82
- mux_tx.vhd#90
- mux_tx.vhd#97|CLK (rising)|TOP (spacefibre_light_top) > inst_mux_tx (mux_tx) > mux_tx.vhd#75| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_data (FIFO_DC) > fifo_dc.vhd#440| ### CDC #349 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_wr_gray`
Usage:
- fifo_dc.vhd#241
- fifo_dc.vhd#243|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#240| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_wr_in_rd`
Usage:
- fifo_dc.vhd#345
- fifo_dc.vhd#348
- fifo_dc.vhd#350|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#344| ### CDC #350 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.cmd_flush_req`
Usage:
- fifo_dc.vhd#441
- fifo_dc.vhd#456
- fifo_dc.vhd#474|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#440| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_tx_data.ptr_wr_in_rd`
Usage:
- fifo_dc.vhd#345
- fifo_dc.vhd#348
- fifo_dc.vhd#350|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_tx_data (FIFO_DC) > fifo_dc.vhd#344| ### CDC #360 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_rd_gray`
Usage:
- fifo_dc.vhd#363
- fifo_dc.vhd#365|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#362| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_fifo_rx_ctrl.ptr_rd_in_wr`
Usage:
- fifo_dc.vhd#223
- fifo_dc.vhd#226
- fifo_dc.vhd#228|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_fifo_rx_ctrl (FIFO_DC) > fifo_dc.vhd#222| ### CDC #362 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.HSSL_RESET_DONE_PLIH`
Usage:
- ppl_64_init_hssl.vhd#209
- ppl_64_init_hssl.vhd#213
- ppl_64_init_hssl.vhd#215|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_ppl_64_init_hssl (ppl_64_init_hssl) > ppl_64_init_hssl.vhd#208| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `inst_reset_sync_clk_from_GTY.reset_gen_r_n`
Usage:
- reset_gen.vhd#57
- reset_gen.vhd#62
- reset_gen.vhd#67
- reset_gen.vhd#69
- reset_gen.vhd#71|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > inst_reset_sync_clk_from_GTY (reset_gen) > reset_gen.vhd#56| ### CDC #364 #### Origin Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `gen_inst_phy_plus_lane.inst_phy_plus_lane.inst_ppl_64_init_hssl.HSSL_RESET_DONE_PLIH`
Usage:
- ppl_64_init_hssl.vhd#209
- ppl_64_init_hssl.vhd#213
- ppl_64_init_hssl.vhd#215|CLK (rising)|TOP (spacefibre_light_top) > gen_inst_phy_plus_lane.inst_phy_plus_lane (phy_plus_lane_64b) > inst_ppl_64_init_hssl (ppl_64_init_hssl) > ppl_64_init_hssl.vhd#208| #### Target Flip-flop |Graph|Signal|Clock Domain|Flip-flop| |:---:|---|---|---| |Graph|Signal: `inst_reset_sync_clk_from_GTY.rst_tx_done_r`
Usage:
- reset_gen.vhd#59
- reset_gen.vhd#64
- reset_gen.vhd#66
- reset_gen.vhd#74|gen_inst_phy_plus_lane.inst_phy_plus_lane.clk_tx (rising)|TOP (spacefibre_light_top) > inst_reset_sync_clk_from_GTY (reset_gen) > reset_gen.vhd#56|